Rev. 1.20 88 January 23, 2015 Rev. 1.20 89 January 23, 2015
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
BS82B12A-3/BS82C16A-3/BS82D20A-3
Touch Key 8-Bit Flash MCU with LED/LCD Driver
IntheCompareMatchOutputMode,thePT0IO1~PT0IO0bitsdeterminehowthe
PTM0outputpinchangesstatewhenacomparematchoccursfromtheComparator
A.ThePTM0outputpincanbesetuptoswitchhigh,switchlowortotoggleits
presentstatewhenacomparematchoccursfromtheComparatorA.Whenthe
PT 0IO1~PT0IO0bitsarebothzero,thennochangewilltakeplaceontheoutput.
TheinitialvalueofthePTM0outputpinshouldbesetupusingthePT0OCbitinthe
PTM0C1register.NotethattheoutputlevelrequestedbythePT0IO1~PT0IO0bits
mustbedifferentfromtheinitialvaluesetupusingthePT0OCbitotherwisenochange
willoccuronthePTM1 outputpinwhenacomparematchoccurs.AfterthePTM0
outputpinchangesstateitcanberesettoitsinitiallevelbychangingthelevelofthe
PT0ONbitfromlowtohigh.
InthePWMMode,thePT0IO1andPT0IO0bitsdeterminehowthePTM0output
pinchangesstate whenacertaincomparematchconditionoccurs.ThePWM
outputfunctionismodiedbychangingthesetwobits.Itisnecessarytochangethe
valuesofthePT0IO1andPT0IO0bitsonlyafterthePTM0hasbeenswitchedoff.
UnpredictablePWMoutputswilloccurifthePT0IO1andPT0IO0bitsarechanged
whenthePTM0isrunning.
B
it3 PT0OC:TP1Outputcontrolbit
CompareMatchOutputMode
0:Initiallow
1:Initialhigh
PWMMode/SinglePulseOutputMode
0:Activelow
1:Activehigh
ThisistheoutputcontrolbitforthePTM0outputpin.Itsoperationdependsupon
whetherPTM0isbeingusedintheCompareMatchOutputModeorinthePWM
Mode/SinglePulseOutputMode.IthasnoeffectifthePTM0isintheTimer/Counter
Mode.IntheCompareMatchOutputModeitdeterminesthelogiclevelofthePTM0
outputpinbeforeacomparematchoccurs.InthePWMModeitdeterminesifthe
PWMsignalisactivehighoractivelow.
Bit2 PT0POL:TP1OutputpolarityControl
0:Non-invert
1:Invert
ThisbitcontrolsthepolarityofthePTM0outputpin.Whenthebitissethighthe
PTM0outputpinwillbeinvertedandnotinvertedwhenthebitiszero.Ithasnoeffect
ifthePTM0isintheTimer/CounterMode.
Bit1 PT0CKS:PTM0capturetriggersourceselect
0:FromTP1_0,TP1_1
1:FromTCK1
Bit0 PT0CCLR:SelectPTM0Counterclearcondition
0:PTM0ComparatrorPmatch
1:PTM0ComparatrorAmatch
Thisbitisusedtoselectthemethodwhichclearsthecounter.Rememberthatthe
PeriodicTMcontainstwocomparators,ComparatorAandComparatorP,eitherof
whichcanbeselectedtocleartheinternalcounter.WiththePT 0CCLRbitsethigh,
thecounterwillbeclearedwhenacomparematchoccursfromtheComparatorA.
Whenthebitislow,thecounterwillbeclearedwhenacomparematchoccursfrom
theComparatorPorwithacounteroverow.Acounteroverowclearingmethodcan
onlybeimplementediftheCCRPbitsareallclearedtozero.ThePT0CCLRbitisnot
usedinthePWM,SinglePulseorInputCaptureMode.