Rev. 1.71 10 April 11, 2017 Rev. 1.71 11 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Pin Name Function OPT I/T O/T Description
PA7/[INT]/
STCK0/RES/
ICPCK
PA7
PAWU
PAPU
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
INT IFS0 ST — External interrupt input
STCK0 IFS0 ST — TM0 (STM) clock input
RES RSTC ST — External reset input
ICPCK — ST CMOS ICP Clock Line
VDD VDD — PWR — Digital positive power supply
AVDD AVDD — PWR — Analog positive power supply
VSS VSS — PWR — Digital negative power supply
AVSS AVSS — PWR — Analog negative power supply
OCDSCK OCDSCK — ST —
On Chip Debug System Clock Line (OCDS EV only)
OCDSDA OCDSDA — ST CMOS On Chip Debug System Data Line (OCDS EV only)
HT66F003
Pin Name Function OPT I/T O/T Description
PA0/[STP0I]/
AN0
/OCDSDA/
ICPDA
PA0
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
STP0I
PASR
IFS0
ST — TM0 (STM) input
AN0 PASR AN — ADC input channel 0
OCDSDA — ST CMOS On Chip Debug System Data Line (OCDS EV only)
ICPDA — ST CMOS ICP Data Line
PA1/AN1/VREF
PA1
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
AN1 PASR AN — ADC input channel 1
VREF PASR AN — ADC VREF Input
PA2/[INT]/
[STCK0]/AN2
/OCDSCK/
ICPCK
PA2
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
INT
PASR
IFS0
ST — External interrupt input
STCK0 IFS0 ST — TM0 (STM) clock input
AN2 PASR AN — ADC input channel 2
OCDSCK — ST —
On Chip Debug System Clock Line (OCDS EV
only)
ICPCK — ST CMOS ICP Clock Line
PA3/INT/
STCK0/AN3
PA3
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
INT
PASR
IFS0
ST — External interrupt input
STCK0 IFS0 ST — TM0 (STM) clock input
AN3 PASR AN — ADC input channel 3
PA4/[INT]/
PTCK1/STP0
PA4
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
INT
PASR
IFS0
ST — External interrupt input
PTCK1
PASR
IFS0
ST — TM1 (PTM) clock input
STP0 PASR — CMOS TM0 (STM) output