Rev. 1.71 12 April 11, 2017 Rev. 1.71 13 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Pin Name Function OPT I/T O/T Description
PA5/[INT]/
PTP1I
PA5
PAWU
PAPU
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
INT
PASR
IFS0
ST — External interrupt input
PTP1I IFS0 ST — TM1 (PTM) input
PA6/[PTCK1]/
STP0I/[STP0]
PA6
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
PTCK1
PASR
IFS0
ST — TM1 (PTM) clock input
STP0I
PASR
IFS0
ST — TM0 (STM) input
STP0 PASR — CMOS TM0 (STM) output
PA7/[PTCK1]/
[STP0B]/RES
PA7
PAWU
PAPU
PASR
ST CMOS
General purpose I/O. Register enabled pull-up and
wake-up
PTCK1
PASR
IFS0
ST — TM1 (PTM) clock input
STP0B PASR ST CMOS TM0 (STM) inverting output
RES RSTC ST — External reset input
PB0/[PTP1I]/
VREFO
PB0
PBPU
PBSR
ST CMOS General purpose I/O. Register enabled pull-up
PTP1I
PBSR
IFS0
ST — TM1 (PTM) input
VREFO PBSR — AN ADC reference voltage output
PB1/[PTCK1]/
STP0B
PB1
PBPU
PBSR
ST CMOS General purpose I/O. Register enabled pull-up
PTCK1
PBSR
IFS0
ST — TM1 (PTM) clock input
STP0B PBSR ST CMOS TM0 (STM) inverting output
PB2/PTP1B
PB2
PBPU
PBSR
ST CMOS General purpose I/O. Register enabled pull-up
PTP1B PBSR ST CMOS TM1 (PTM) inverting output
PB3/[PTP1]
PB3
PBPU
PBSR
ST CMOS General purpose I/O. Register enabled pull-up
PTP1 PBSR — CMOS TM1 (PTM) output
PB4/[PTP1B]
PB4
PBPU
PBSR
ST CMOS General purpose I/O. Register enabled pull-up
PTP1B PBSR — CMOS TM1 (PTM) inverting output
PB5/PTP1
PB5
PBPU
PBSR
ST CMOS General purpose I/O. Register enabled pull-up
PTP1 PBSR — CMOS TM1 (PTM) output
VDD VDD — PWR — Digital positive power supply
AVDD AVDD — PWR — Analog positive power supply
VSS VSS — PWR — Digital negative power supply
AVSS
AVSS — PWR — Analog negative power supply