3-59
Performance Tests
External Clock/Data Reference Inputs & Clock Reference Output
External Clock/Data Reference Inputs & Clock
Reference Output
Specifications
NOTE The Rates available are dependent on the HP 37718A/19A option
Description
This test verifies that signal integrity is maintained when an
EXTERNAL clock is used as a reference.
Equipment Required
Clock Rate Description
2.048 Mb/s MTS Accepts timing reference as per ITU-T G.811
10 MHz Reference Accepts 10 MHz timing reference
1.544 Mb/s BITS Accepts DS-1 timing reference as per TA-TSY-
000378
64 kb/s Accepts 64 kb/s timing reference as per ITU-T G.703
Section 1.2.2
STM-1/STS-3 Receive Recovers clock from received STM/STS input signal.
Synthesizer
: HP 3335A option 001 (75Ω)
PDH/DSn Test Set : HP 37718A/19A
110Ω/75Ω Balanced to
Unbalanced Converter
: HP 15508B
Frequency Counter : HP 5335A Opt 010
64kb/s Test Set : HP 37732A