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IDTECH SREDKey - SREDKey Product Description; Product Overview and Configurations; Encryption and Interface Details

IDTECH SREDKey
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4
Tamper Trigger Troubleshooting
Various conditions can lead to the triggering of a tamper event. Those conditions (and
the associated abbreviations: HTF, LTF, HVF3, etc.) are outlined in the table below.
Abbreviations
BOR Battery-on reset (battery attach).
DRS Destructive reset (that is, reset involving zeroization of secure data).
LCD Display
Tamper Trigger Cause
HTF
High Temperature Flag. When set, this bit indicates that the
enabled (TMPENH = 1) temperature sensor has detected
the chip temperature above +125 C and caused a DRS. The
bit is typically interrogated to determine if a DRS was caused
by the chip’s high temperature when the on-chip
temperature sensor is enabled. (Normally, this is enabled
when the security lock bit is locked by the ROM Loader.) This
flag must be cleared by software once set, otherwise this bit
is unaffected by any other resets except BOR. Setting of this
bit by software will not generate a DRS.
LTF
Low Temperature Flag. When set, this bit indicates that the
enabled (TMPENL = 1) temperature sensor has detected
the chip temperature below -60 C and caused a DRS. It is
typically interrogated to determine if a DRS was caused by
the chip’s low temperature when the on-chip temperature
sensor is enabled. (Normally, this is enabled when the
security lock bit is locked by the ROM Loader.) This flag
must be cleared by software once set, otherwise this bit is
unaffected by any other resets except BOR. Setting of this
bit by software will not generate a DRS.
HVF3
High VDDIO Flag. When set, this bit indicates that the
enabled (HIVOLEN = 1) voltage monitor has detected the
VDDIO has reached above +4V and caused a reset. The flag
is typically interrogated to determine if a reset was caused
by the chip’s high voltage when the voltage monitor is
enabled. (Normally it is enabled when the security lock bit
is locked by the ROM Loader.) This flag must be cleared by
software once set, otherwise this bit is unaffected by any
other resets except BOR. Setting of this bit by software will
not generate a reset.

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