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Integra DTR-5.9 Service Manual

Integra DTR-5.9
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DTR-5.9
SCHEMATIC DIAGRAMS-12
WAVEFORM SECTION-1/3
LR CLOCK (SAI_LRCK, CX_LRCK)
Fs = 48kHz : DVD, Clock width = 20.8 s
Fs = 44.1kHz : CD, Clock width = 22.7 s
BIT CLOCK (SAI_SLCK, CX_SLCK)
64Fs = 3072kHz : DVD, Clock width = 325ns
64Fs = 2822.4kHz : CD, Clock width = 354ns
WF02
WF03
WF05 WF06
WF08 WF09
4.0V
Duty varies according to audio data
3.3V
3.3V
325 ns
5.0V
Duty always varies according to
audio data
3.3V
Duty varies according to audio data
OPT1
(SD-3 : C5)
(SD-3 : C4) (SD-3 : C4) (SD-3 :D4)
(SD-3 : D4) (SD-3 : D4) (SD-3 : E2)
(SD-3 : F2) (SD-3 : F2)
(SD-3 : C5) (SD-3 : C5)
COAX1
SAI_SDOUT
SAI_LRCK SAI_SLCK CX_SDIN1
CX_LRCK CX_SCLK DAC_OUT-
AUDIO_FL WF10
AUDIO_FL
3.3V
3.3V
3.3V
325 ns
220mVp-p
Aliasing noise in no audio data
Analog audio waveform with
aliasing noise
0V
2.8V
Analog audio waveform with
aliasing noise
0V
2.8V
<Notes>
1. WF01 is short for Waveform-01 .
2. Refer to SD-3 (SCHEMATIC DIAGRAMS-3) for the location of each waveform on circuit.
3. SD-x : XY is short for Schematic Diagrams-x and each socket's location, X=A to H, Y=1 to 5.
Digital Audio Waveform Part
WF01
WF07
WF04
WF10
20.8
s
20.8
s
20.8
s
A
1
2
3
4
5
BCD
w
w
w
.
x
i
a
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y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com

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Integra DTR-5.9 Specifications

General IconGeneral
BrandIntegra
ModelDTR-5.9
CategoryReceiver
LanguageEnglish

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