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Integra DTR-5.9 Service Manual

Integra DTR-5.9
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DTR-5.9
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-5
Q201 : D788E001BRFP266 (Floating-Point Digital Signal Processor)-5/5
TERMINAL DESCRIPTION
Pin Name
OSCIN
OSCOUT
OSCVDD
OSCVSS
CLKIN
PLLHV
Pin No.
23
24
25
22
17
27
Type
I
O
---
---
I
---
Description
1.2-V Oscillator Input
1.2-V Oscillator Output
Oscillator 1.2-V VDD tap point (for filter only)
Oscillator VSS tap point (for filter only)
Alternate clock input (3.3-V LVCMOS Input)
PLL 3.3-V Supply Input (requires external filter)
Clocks
Emulation/JTAG Port
Pin Name
TCK
TMS
TDI
TDO
TRST
EMU[0]
EMU[1]
Pin No.
35
19
28
29
21
32
34
Type
I
I
I
O
I
IO
IO
Description
Test Clock
Test Mode Select
Test Data In
Test Data Out
Test Reset
Emulation Pin 0
Emulation Pin 1
Device Reset
Pin Name
RESET
Pin No.
14
Type
I
Description
Device reset pin
Power Pins
Pin Name
Core Supply (CVDD)
IO Supply (DVDD)
Ground (VSS)
Pin No.
8, 16, 20, 33, 44, 53, 57, 65, 77, 85, 90, 101, 123, 128, 132
10, 31, 42, 50, 60, 68, 73, 81, 92, 103, 112, 125, 136
1, 6, 13, 15, 18, 26, 30, 36, 40, 47, 54, 62, 69, 72, 78, 82, 87, 95, 99, 106, 109, 114, 118, 124,
129, 133, 140
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com

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Integra DTR-5.9 Specifications

General IconGeneral
BrandIntegra
ModelDTR-5.9
CategoryReceiver
LanguageEnglish

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