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Integra DTR-5.9 Service Manual

Integra DTR-5.9
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DTR-5.9
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-4
Q201 : D788E001BRFP266 (Floating-Point Digital Signal Processor)-4/5
TERMINAL DESCRIPTION
Pin Name
AHCLKR0/AHCLKR1
ACLKR0
AFSR0
AHCLKX0/AHCLKX2
ACLKX0
AFSX0
AMUTE0
AXR0[0]
AXR0[1]
AXR0[2]
AXR0[3]
AXR0[4]
AXR0[5]/SPI1_SCS
AXR0[6]/SPI1_ENA
AXR0[7]/SPI1_CLK
AXR0[8]/AXR1[5]/
SPI1_SOMI
AXR0[9]/AXR1[4]/
SPI1_SIMO
AXR0[10]/AXR1[3]
AXR0[11]/AXR1[2]
AXR0[12]/AXR1[1]
AXR0[13]/AXR1[0]
AXR0[14]/AXR2[1]
AXR0[15]/AXR2[0]
ACLKR1
AFSR1
AHCLKX1
ACLKX1
AFSX1
AMUTE1
Pin No.
143
139
141
2
142
144
3
113
115
116
117
119
120
121
122
126
127
130
131
134
135
137
138
9
12
5
7
11
4
Type
IO
IO
IO
IO
IO
IO
O
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
O
Description
McASP0 and McASP1 Receive Master Clock
McASP0 Receive Bit Clock
McASP0 Receive Frame Sync (L/R Clock)
McASP0 and McASP2 Transmit Master Clock
McASP0 Transmit Bit Clock
McASP0 Transmit Frame Sync (L/R Clock)
McASP0 MUTE Output
McASP0 Serial Data 0
McASP0 Serial Data 1
McASP0 Serial Data 2
McASP0 Serial Data 3
McASP0 Serial Data 4
McASP0 Serial Data 5 or SPI1 Slave Chip Select
McASP0 Serial Data 6 or SPI1 Enable (Ready)
McASP0 Serial Data 7 or SPI1 Serial Clock
McASP0 Serial Data 8 or McASP1 Serial Data 5 or
SPI1 Data Pin Slave Out Master In
McASP0 Serial Data 9 or McASP1 Serial Data 4 or
SPI1 Data Pin Slave In Master Out
McASP0 Serial Data 10 or McASP1 Serial Data 3
McASP0 Serial Data 11 or McASP1 Serial Data 2
McASP0 Serial Data 12 or McASP1 Serial Data 1
McASP0 Serial Data 13 or McASP1 Serial Data 0
McASP0 Serial Data 14 or McASP2 Serial Data 1
McASP0 Serial Data 15 or McASP2 Serial Data 0
McASP1 Receive Bit Clock
McASP1 Receive Frame Sync (L/R Clock)
McASP1 Transmit Master Clock
McASP1 Transmit Bit Clock
McASP1 Transmit Frame Sync (L/R Clock)
McASP1 MUTE Output
McASP0, McASP1, McASP2, and SPI1 Serial Ports
SPI0, I2C0, and I2C1 Serial Port Pins
Pin Name
SPI0_SOMI/I2C0_SDA
SPI0_SIMO
SPI0_CLK/I2C0_SCL
SPI0_SCS/I2C1_SCL
SPI0_ENA/I2C1_SDA
Pin No.
111
110
108
107
105
Type
IO
IO
IO
IO
IO
Description
SPI0 Data Pin Slave Out Master In or I2C0 Serial Data
SPI0 Data Pin Slave In Master Out
SPI0 Serial Clock or I2C0 Serial Clock
SPI0 Slave Chip Select or I2C1 Serial Clock
SPI0 Enable (Ready) or I2C1 Serial Data
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com

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Integra DTR-5.9 Specifications

General IconGeneral
BrandIntegra
ModelDTR-5.9
CategoryReceiver
LanguageEnglish

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