Intel 440BX Manual&Nbsp;

Intel
®
440Bx Scalable Performance Board Development Kit Manual 25
Theory of Operation
The CY2318NZ clock buffer is used to buffer the clock signals sent to the SDRAM DIMMS. The
SDRAM interface operates at 66 or 100 MHz.
3.2.22 Interrupt Map
3.2.23 Memory Map
Table 2. Interrupts
IRQ System Resources
NMI I/O Channel Check
0 Reserved, Interval Timer
1 Reserved, Keyboard buffer full
2 Reserved, Cascade interrupt from slave PIC
3 Serial Port 2
4 Serial Port 1
5 Parallel Port (PNP0 option)
6 Floppy
7 Parallel Port 1
8 Real Time Clock
9 IRQ2 Redirect
10 Reserved. Not supported.
11 Reserved. Not supported.
12 Onboard Mouse Port if present, else user available
13 Reserved, Math coprocessor
14 Primary IDE if present, else user available
15 Reserved. Not supported.
Table 3. Memory Map
Address Range
(Hex)
Size Description
100000-8000000 127.25M Extended Memory
E0000-FFFFF 128K BIOS
C8000-DFFFF Available expansion BIOS area (Flash disk memory window)
A0000-C7FFF Off-board video memory and BIOS
9FC00-9FFFF 1K Extended BIOS Data (movable by QEMM, 386MAX)
80000-9FBFF 127K Extended conventional
00000-7FFFF 512K Conventional

Intel 440BX Specifications

General

Brand	Intel
Model	440BX
Category	Motherboard
Language	English