Product Description
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1.5.1.3 Advanced Digital Display (ADD2/ADD2+) Card Support
The GMCH routes two multiplexed DVO ports that are each capable of driving up to a 200 MHz
pixel clock to the PCI Express x16 connector. The DVO ports can be paired for a dual channel
configuration to support up to a 400 MHz pixel clock. When an ADD2/ADD2+ card is detected,
the Intel GMA950 graphics controller is enabled and the PCI Express x16 connector is configured
for DVO mode. DVO mode enables the DVO ports to be accessed by the ADD2/ADD2+ card. An
ADD2/ADD2+ card can either be configured to support simultaneous display with the primary
VGA display or can be configured to support dual independent display as an extended desktop
configuration with different color depths and resolutions. ADD2/ADD2+ cards can be designed to
support the following configurations:
• TV-Out (composite video)
• Transition Minimized Differential Signaling (TMDS) for DVI 1.0
• Low Voltage Differential Signaling (LVDS)
• Single device operating in dual channel mode
• VGA output
• HDTV output
1.5.1.4 Configuration Modes
A list of supported modes for the Intel GMA950 graphics controller is available as a downloadable
document.
For information about Refer to
Supported video modes for the board Section 1.2, page 15
1.5.2 USB
The board supports up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and
EHCI-compatible drivers.
The ICH7 provides the USB controller for all ports. The port arrangement is as follows:
• Four ports are implemented with dual stacked back panel connectors adjacent to the audio
connectors
• Four ports are routed to two separate front panel USB connectors
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 19, page 55
The location of the front panel USB connectors Figure 20, page 56
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