Product Description
19
• PCI Express 1.x with a raw bit rate of 2.5 GT/s results in an effective bandwidth of
250 MB/s each direction per lane. The maximum theoretical bandwidth of the x16
interface is 4 GB/s in each direction, simultaneously, for a total bandwidth of
8 GB/s.
For information about Refer to
PCI Express technology http://www.pcisig.com
1.4 System Memory
The board has four DIMM sockets and supports the following memory features:
• 1.5 V DDR3 SDRAM DIMMs with gold plated contacts, with the option to raise the
voltage to support higher performance DDR3 SDRAM DIMMs.
• 1.35 V Low Voltage DDR3 DIMMs (JEDEC specification)
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMs with x16 organization are not supported.
• 32 GB maximum total system memory (using 4 Gb memory technology). Refer to
Section 2.1.1 on page 45 for information on the total amount of addressable
memory.
• Minimum total system memory: 1 GB using 512 MB x16 module
• Non-ECC DIMMs
• Serial Presence Detect
• DDR3 1600 MHz, DDR3 1333 MHz, and DDR3 1066 MHz SDRAM DIMMs
Note: DDR3 1600 MHz DIMMs are only supported by 3
rd
generation Intel Core
processor family processors
• XMP version 1.3 performance profile support for memory speeds of 1600 MHz and
higher
NOTE
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This allows the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory
is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the DIMMs may not function under the
determined frequency.