Intel GD82559ER User Manual

Datasheet
55
Networkin
g
Silicon — GD82559ER
7.1.19 Power Mana
g
ement Control/Status Re
g
ister
(
PMCSR
)
The Power Management Control/Status is a word register. It is used to determine and change the
current power state of the 82559ER and control the power management interrupts in a standard
manner.
24:22 000b Read Onl
y
Auxiliary Current.
This field reports whether the 82559ER
implements the Data re
g
isters. The auxiliar
y
power consumption is
the same as the current consumption reported in the D3 state in the
Data re
g
ister.
21 1b Read Onl
y
Device Specific Initialization (DSI).
The DSI bit indicates whether
special initialization of this function is re
q
uired
(
be
y
ond the standard
PCI confi
g
uration header
)
before the
g
eneric class device driver is
able to use it. DSI is re
q
uired for the 82559ER after D3-to-D0 reset.
20 0b
(
PCI
)
Read Onl
y
Reserved (PCI).
When this bit is set to ‘1’, it indicates that the
82559ER re
q
uires auxiliar
y
power supplied b
y
the s
y
stem for wake-
up from the D3
cold
state.
19 0b Read Onl
y
PME Clock.
The 82559ER does not re
q
uire a clock to
g
enerate a
power mana
g
ement event.
18:16 010b Read Onl
y
Version.
A value of indicates that the 82559ER complies with the PCI
Power Mana
g
ement Specification, Revision 2.2.
Table 8. Power Mana
g
ement Ca
p
abilit
y
Re
g
ister
Bits Default Read/Write Description
Table 9. Power Mana
g
ement Control and Status Re
g
ister
Bits Default Read/Write Description
15 0b Read/Clear
PME Status.
This bit is set upon a wake-up event. It is independent of
the state of the PME Enable bit. If 1b is written to this bit, the bit will be
cleared. It also de-asserts the PME# si
g
nal and clears the PME status
bit in the Power Mana
g
ement Driver Re
g
ister. When the PME# si
g
nal
is enabled, the PME# si
g
nal reflects the state of the PME status bit.
14:13 00b Read Onl
y
Data Scale.
This field indicates the data re
g
ister scalin
g
factor. It
e
q
uals 10b for re
g
isters zero throu
g
h ei
g
ht and 00b for re
g
isters nine
throu
g
h fifteen.
12:9 0000b Read Onl
y
Data Select.
This field is used to select which data is reported throu
g
h
the Data re
g
ister and Data Scale field.
8 0b Read Clear
PME Enable.
This bit enables the 82559ER to assert PME#.
7:5 000b Read Onl
y
Reserved
. These bits are reserved and should be set to 000b.
4 0b Read Onl
y
Dynamic Data.
The 82559ER does not support the abilit
y
to monitor
the power consumption d
y
namicall
y
.
3:2 00b Read Onl
y
Reserved.
These bits are reserved and should be set to 00b.
1:0 00b Read/Write
Power State.
This 2-bit field is used to determine the current power
state of the 82559ER and to set the 82559ER into a new power state.
The definition of the field values is as follows.
00 - D0
01 - D1
10 - D2
11 - D3

Intel GD82559ER Specifications

General

Brand	Intel
Model	GD82559ER
Category	Computer Hardware
Language	English