JVL MAC050 - Page 444

440 JVL A/S - User Manual - Integrated Servo Motors MAC050 - 4500
6.12 Registers
Only MAC400 to 4500
TT15 -02GB53
Reg.
Nr.
Firmware / MacRegIo
Name
MacTalk
Name
Size /
Access
Description
222 IOSETUP
(not
present)
Na /
0
Word /
RW
-
Selects which hardware analogue input signal that goes to the main
ANINP register 170 that controls the analogue modes of the motor.
Bits 3:0 values supported:
0: ANINP = Reg216_ANINP1 + Reg171_ANINP_OFFSET
1: ANINP = Reg216_ANINP1 + Reg217_ANINP1_OFFSET
2: ANINP = Reg218_ANINP2 + Reg219_ANINP2_OFFSET
3: ANINP = Reg220_ANINP3 + Reg221_ANINP3_OFFSET
Bits 31:4 are reserved for future use, keep them zeroed.
223 ANOUT1
(not
present)
Na /
0
Word /
RW
- The value written here by the user, or by the firmware, will be output to
the 4-20 mA hardware output on the MAC00-P5/P4 modules.
224 ANOUT1_OFFSET
(not
present)
Na /
0
Word /
RW
- Offset that is added to ANOUT1 before writing to hardware.
225 P_OFFSET
(not
present)
Na /
0
Word /
RW
- Used to adjust the zero position for absolute multi-turn encoders.
226 P_MULTITURN
(not
present)
Na /
0
Word /
RW
- The full multi-turn position read directly from the absolute encoder, if
mounted.
227 AIFILT_MAXSLOPE
(not
present)
Na /
0
Word /
RW
- Can limit the rise time on the currently selected analogue input a this
number of samples per cycle time.
228 AIFILT_FILTFACT
(not
present)
Na /
0
Word /
RW
- Can be set to filter the currently selecte danalogue input by taking 1/X
of each new value plus the remaining part from the old value, instead
of just replacing the valid value with 100 percent of the new value.
229 P_QUICK N/A Na /
0
Word /
RW
- The actual position of the internal encoder. Much like P_IST, but
updated every 100us. P_IST is updated only once every 1.3ms (or 2.6
ms for OUTLOOPDIV=2).
230 XREG_ADDR
(not
present)
Na /
0
Word /
RW
- Address of extended registers, XREGs.
A positive value will write the contents of Reg231, XREG_DATA, to that
register.
A negative value will cause the value of that XREG to be writen to
XREG_DATA.
After the reading or writing operation has completed, XREG_ADDR will
be set to zero.
The first NN XREGs are used for configuration of the switchboard for
hardware signals that can be routed in several ways through the FPGA
in MAC800 HW 1.8 and later or MAC400 HW1.? And later.
231 XREG_DATA
(not
present)
Na /
0
Word /
RW
- Data to or from extended registers. See XREG_ADDR for description
232 FIELDBUS_ADDR
(not
present)
0Word/
RW
Can be used to override DIP switches for bus address on some
modules, like MAC00-FCx.
233 FIELDBUS_SPEED
(not
present)
0Word/
RW
Can be used to override DIP switches for bus speed on some modules,
like MAC00-FCx
234 RXP_SETUP
<Rxp
Menu>
0Word/
RW
Controls operation of the built-in nanoPLC/eRxP.
Controls basic operation mode and the option to don't start program
after power up.
235 ERR_STAT_2
(not
present)
Na/
0
N/U Not used yet, but reserved for expansion of Reg35, ERR_STAT.
236 SETUP_BITS
N/A
0Word/
RW
Various bits to enable special functions:
Bit 0: ZUP_PID_ON:
Enable general-purpose PID mode
Bit 1: ZUP_PID_DEBUG:
Enable debug outputs for PID mode.
Bit 2: ZUP_MODBUS_SCALE
Enable on-the-fly scaling on the main Modbus interface.
Bit 3: ZUP_MACTALK_SCALE
Enable on-the-fly scaling on the MacTalk interface – also works when
this is configured for Modbus operation.
Bit 4: ZUP_NANOPLC_SCALE
Enable on-the-fly scaling in the eRxP system.