COMPONENT MAINTENANCE MANUAL
AVIATION RECORDERS
Model FA5000
Initital Issue Page 14
Sep. 30/11
Description and Operation
23–70−40
Use or disclosure of information on this sheet is subject to
the restrictions on the cover page of this document.
E11 fpga_RES_FDR_STATUS_C
ontrol_set
O 3.3VDC CMOS output pulled high to 3.3
volts by default. The CMOS low voltage
output, V
OL,
does not exceed 0.4VDC.
The signal controls an NFET gate hav
ing a 0.5VDC minimum voltage input
threshold. The NFET controls relay coil
current to implement discrete signaling
through the relay contacts. Referenced
to the Signal Ground.
D4 FSK_OUT O Frequency Shift Keying output for time
stamp code. Referenced to the Signal
Ground. No circuitry exists on the AI
PWA to support this signal.
G7 pwr_OverVoltage_Fault_n I Open drain input to indicate overvoltage
on either +28VDC Input Primary or
+28VDC Input Secondary aircraft power.
Overvoltage threshold is set to
34.08VDC and excludes the 0.75VDC
forward voltage drop of the input power
isolation diode. Referenced to the
40VDC_RTN.
C3 ROTOR_SPEED_IN_HI I Rotor Speed / Tachometer RS422 dif
ferential input, line high. Referenced to
the Signal Ground.
C4 ROTOR_SPEED_IN_LO I Rotor Speed / Tachometer RS422 dif
ferential input, line low. Referenced to
the Signal Ground.
F3 Test_Indicator_Power O +12 volts DC with a 1mA current limit.
Referenced to the Signal Ground. Not
Used. Circuitry not populated on the
FA5001 AI PWA.
B5, B6,
B7, B8,
B9,
B10,
B11
40VDC I +40 volts dc boosted supply. Referenced
to the 40VDC_RTN.
A5, A6,
A7, A8,
A9,
A10,
A11
40VDC_RTN Return path for the +40 volts dc boosted
supply.
A2 HoldUpCap_Voltage I Hold up capacitor voltage input. Refer
enced to 40VDC_RTN.
The document reference is online, please check the correspondence between the online documentation and the printed version.
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