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LG CU920 - Page 35

LG CU920
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LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
- 37 -
Inpu t Power
Management
Outp ut
Voltage
Regu lation
General
Housekeeping
External Supply
Detector
Trickle Charger
Battery
Control
Coin Cell
Charger
Battery
Detector
s
IC
Interfaces
VCHG
ISNS_M
ISNS_P
CHG_CTL_N
BAT_FET_N
VCOIN
VBAT
VBACKUP
Reference
Circuit
MSM_PAD
Regulato
r
USB
Regulator
MSM_Analog
Regulator
TCXO
Regulator
Synthesizer
Regulator
RF_TX
Regulator
RF_RX2
Regulato
r
WLAN
Regulator
REF_ISET
REF_GND
VREG_MSMP
VREG_MSMC
VREG_SYNT
VREG_RFTX
VREG_RFRX2
VREG_WLAN
VREG_MSMA
VREG_TCXO
ADC_BYP
AMUX_IN1 (MPP1)
TCXO_IN
TCXO_OUT
XTAL_IN XTAL_OUT
AMUX_IN2 (MPP2)
SLEEP_CLK
KPDPWR_N
CBL1PWR_N (MPP4)
CBL0PWR_N (MPP3)
USB_VBUS
PON_RESET_N
MSM_INT_N
SBDT
SBCK
SBST
PS_HOLD
TCXO_EN
Center Sl
ug
Offset and
Scaling
MUX
mux
div
RC Osc
Circuit
s
TCXO
Controlle
r
to TCXO
Re
g
Vcoin
PON_RESET_
N
Real Time Clock
VREF
to / from
Power On Circuits
VDD_MSM
VDD_RF
VDD_W
LAN
Power-on
Circuit
s
Serial Bus
Interfac
e
Interrupt
Manager
GND_SLUG
I/F
I/F
I/F
I/F
from TCXO
Contro
ller
Under-Volt
Locko
ut
internal interface connections
Charger
Contro
l
VMAXSEL
diff
IMAXSEL_F
C
MUX
VBATDET
THLVB
VREF
VRE
F
to digital
I/O ci rcuit
s
VREG
_5V
USB_CTL_N
VREG_MSMP
AMUX_OUT
VREF
REF_OUT
(MPP8)
USB-OTG
Transceiv
er
RUIM Level
Translator
USB_SE0
USB_OE_N
USB_DA
T
RUIM_M_IO (MPP11)
RUIM_M_RST (MPP5)
RUIM_M_CLK (MPP9
)
USB_D_P
USB_D_M
USB_ID
RUIM_RST (MPP6)
RUIM_CLK (MPP10)
RUIM_IO (MPP12)
RF_RX1
Regulato
r
VREG_RFRX1
REF_BYP
+5V Boost
Regulato
r
Core Buck
Regulato
r
EBI Buck
Regulato
r
PA Buck
Regulato
r
MMC
Regulato
r
RUIM
Regulator
VREG_MMC
VREG_RUI
M
VDD_RUIM
VREG_USB
FLSH_DRV_N
GP1_DRV_N (MPP7)
KPD_DRV_N
LCD_DRV
_N
Current Controls
VIB_DRV_N
Voltage
Contro
l
SPKR_OUT_P
SPKR_OUT_MSPKR_IN_M
SPKR_IN_P
SPKR_BYP
Ref
VDD_SPKR
I/F
VREF
User
Interfac
es
VRE G_ 5 V
VREG_5
V
VSW_MSMC
VREG_5V
VSW_5V
VREG_MSME
VSW_MSME
VREG_PA
VSW_PA
VDD_MAIN
VDD_MSMC
VDD_MSME
VDD_PA
VDD_ANA
to internal
analog ck
ts
to internal
logic ckt
s
SMPS
Clock
Circuit
s
to SMPS
circui
ts
USB-OTG
host power ck
t
detect
VUSB
VUS
B
swit
ch
Figure. 3.5.5.2 PM6650 Block Diagram

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