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3. TECHNICAL BRIEF
The MEGA Camera module is
connected to 34pin connector
(AXK7L34227G). Its interface is
dedicated camera interface port in
MSM6281. The camera port supply
24.576MHz master clock to camera
module and receive 40.2MHz pixel
clock (15fps), vertical sync signal,
horizontal sync signal, reset signal
and 8bits data from camera module.
The camera module is controlled by
I2C port from MSM6281.
LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
VDDD 1.5vIVREG_CAM_1.8V34
VDDD 1.5vIVREG_CAM_1.8V33
VDDCAM 2.8vIVREG_CAM_IO_2.8V32
VDDCAM 2.8vIVREG_CAM_IO_2.8V31
DATAOCAM_DATA(7)30
DATAOCAM_DATA(6)29
DATAOCAM_DATA(5)28
DATAOCAM_DATA(4)27
DATAOCAM_DATA(3)26
DATAOCAM_DATA(2)25
DATAOCAM_DATA(1)24
DATAOCAM_DATA(0)23
GNDGNDGND22
Master Clock(24.576M)ICAM_MCLK21
GNDGNDGND20
Vertical SyncOCAM_VSYNC19
Horizonal SyncOCAM_HSYNC18
VDDA 2.8vIVREG_CAM_2.8V17
VDDA 2.8vIVREG_CAM_2.8V16
VDDIO 2.8vIVREG_CAM_ACT15
VDDIO 2.8vIVREG_CAM_ACT14
Camera power downICAM_PWDN13
GNDGNDGND12
N/AN/AN/A11
N/AN/AN/A10
I2C Clock
I/OI2C_SCL9
I2C DataI/OI2C_SDA8
N/AN/AN/A7
GNDGNDGND6
Camera reset signalICAM_RESET_N5
GNDGNDGND4
GNDGNDGND3
Pixel ClockOCAM_PCLK2
GNDGNDGND1
NotePortName
No
Table. Interface between MEGA
Camera Module and MAIN PCB
(in camera module)
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