Marantz DV9600 - Page 143

No. Pin name I/O
3
Attribute Description
33 DAOUT4 OUT Analog
Analog video image output pin (Y/G).
Connect it to the emitter-follower circuit.
34 DAVDD4 P -
Analog VDD (+ 3.3 V) exclusively for DAC.
Separate it from VDD (+ 3.3 V) for IO.
35 DAGND3 P -
Analog ground exclusively for DAC.
Separate it from the digital ground.
36 DAOUT3 OUT Analog
Analog video image output pin (YC-C).
Connect it to the emitter-follower circuit.
37 DAVDD3 P -
Analog VDD (+ 3.3 V) exclusively for DAC.
Separate it from VDD (+ 3.3 V) for IO.
38 DAGND2 P -
Analog ground exclusively for DAC.
Separate it from the digital ground.
39 DAOUT2 OUT Analog
Analog video image output pin (YC-Y).
Connect it to the emitter-follower circuit.
40 DAVDD2 P -
Analog VDD (+ 3.3 V) exclusively for DAC.
Separate it from VDD (+ 3.3 V) for IO.
41 DAGND1 P -
Analog ground exclusively for DAC.
Separate it from the digital ground.
42 DAOUT1 OUT Analog
Analog video image output pin (CVBS)
Connect it to the emitter-follower circuit.
43 DAVDD1 P -
Analog VDD (+ 3.3 V) exclusively for DAC.
Separate it from VDD (+ 3.3 V) for IO.
44 DAVDD P -
Analog VDD (+ 3.3 V) exclusively for DAC.
Separate it from VDD (+ 3.3 V) for IO.
45 DACOUT OUT Analog
Pin connecting capacitor for compensation of DAC
internal reference voltage. Connect it to the analog
VDD via the 0.1 PF capacitor.
46 DAVREFOUT OUT Analog
Resistance connect pin for setting the DAC internal
current. Connect it to the analog ground via a
high-accuracy 10 k: resistance with an error of 1% or
lower.
47 DAVREFIN IN Analog DAC reference voltage input pin.
48 DAGND P -
Analog ground exclusively for DAC.
Separate it from the digital ground.
49 TEST2 IN CMOS
Input pin exclusively for testing.
Connect to VDD (+ 3.3 V) for IO.
50 TEST3 IN CMOS
Input pin exclusively for testing.
Connect it to the ground.
51 TEST4 IN CMOS
Input pin exclusively for testing.
Connect it to the ground.
52 TEST5 IN CMOS
Input pin exclusively for testing.
Connect it to the ground.
53 TEST6 IN CMOS
Input pin exclusively for testing.
Connect it to the ground.
54 VDDE P - VDD for IO (+ 3.3 V).
55 VDDI P - VDD for Core (+ 1.8 V).
56 CLMP2 OUT CMOS
Clamp pulse output pin for YPbPr / RGB output signal.
Keep it open when not in use.
57 CLMP1 OUT CMOS
Clamp pulse output pin for CVBS / YC output signal.
Keep it open when not in use.
58 VSS P - Digital ground.
59 RFFO OUT CMOS
MPEG information (repeat-first-field flag) output pin.
Keep it open when not in use.
60 FILM OUT CMOS
Film detection flag output pin.
Keep it open when not in use.
61 NHSO OUT CMOS
Horizontal synchronous output pin for digital output
image data.
Keep it open when not in use.
62 NVSO OUT CMOS
Vertical synchronous output pin for digital output image
data.
Keep it open when not in use.
63 FLD OUT CMOS
Field flag signal output pin for digital output image data.
Keep it open when not in use.
[PM01] QK01 : CM0039AF
175