Microchip Technology dsPIC33 series - Register 3-27: C1 FIFOBAH: CAN Message Memory Base Address Register High; Register 3-28: C1 FIFOBAL: CAN Message Memory Base Address Register Low

dsPIC33/PIC24 Family Reference Manual
DS70005340A-page 28  2018 Microchip Technology Inc.
Register 3-27: C1FIFOBAH: CAN Message Memory Base Address Register High
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
FIFOBA<31:24>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
FIFOBA<23:16>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 FIFOBA<31:16>: Message Memory Base Address bits
Defines the base address for the transmit event FIFO followed by the message objects.
Register 3-28: C1FIFOBAL: CAN Message Memory Base Address Register Low
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
FIFOBA<15:8>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
FIFOBA<7:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 FIFOBA<15:0>: Message Memory Base Address bits
Defines the base address for the transmit event FIFO followed by the message objects.