Lessons
2012 Microchip Technology Inc. DS41628B-page 73
3.10.4.0.2 OPTION_REG
This register controls Timer0 settings as well as some miscellaneous features, such as
weak pull-ups, which will be used in later lessons.
3.10.4.1 PIC18
3.10.4.1.1 T0CON
The T0CON register and OPTION_REG are similar with respect to the prescaler set-
tings and Timer0 assignment bits. The enhanced mid-range Timer0 is always enabled,
so there is no need to enable it. The weak pull-ups and INT detection are performed in
separate registers on the PIC18.
Timer0 will generate an interrupt when the TMR0 register overflows from 0xFF to 0x00
(if in 8-bit mode for the PIC18). The TMR0IF interrupt flag bit of the INTCON register is
set every time the TMR0 register overflows, regardless of whether or not the Timer0
interrupt is enabled. The TMR0IF bit can only be cleared in software. The Timer0 inter-
rupt enable is the TMR0IE bit of the INTCON register.
3.10.5 Assembly
3.10.5.1 PIC16
EXAMPLE 3-36:
The MainLoop label of the program will simply wait for the timer to overflow. When it
does, it will clear the flag and shift the LEDs. The flag MUST be cleared in software. If
this lesson is compared with Lesson 3, the reader should notice a reduction in code,
and that it is easier to follow. Timers greatly simplify delay loops and are great for
events that need precise timing.
3.10.5.2 PIC18
The only differences are that the initialization is slightly different and the relative branch
uses “$-2”.
3.10.6 C Language
Nothing new.
TABLE 3-31: NEW REGISTERS FOR PIC18
Register Purpose
T0CON Timer0 configuration
btfss INTCON, TMR0IF ;did TMR0 roll over yet?
bra $-1 ;wait until TMR0 overflows and sets TMR0IF
bcf INTCON, TMR0IF ;must clear flag in software
;rotate the LEDs
.....
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