Microchip Technology PICkit 3 - New Registers; New Instructions

Lessons
 2012 Microchip Technology Inc. DS41628B-page 81
3.12.4 New Registers
3.12.4.1 BOTH
3.12.4.1.1 INDFx/FSRx
Because indirect addressing on both the PIC18 and enhanced mid-range core use the
full address range, data RAM banking is not necessary. The FSR registers on the
PIC18 form a 12-bit address while the enhanced mid-range forms a 16-bit address.
This means that the PIC18 FSR provides access to the whole data memory range,
while the enhanced mid-range gives access to all of the memory banks including
read-only access program memory.
FIGURE 3-15: ENHANCED MID-RANGE INDIRECT/DIRECT ADDRESSING
3.12.5 New Instructions
3.12.5.1 BOTH
3.12.5.1.1 incf
This increments a file register by a value of one.
TABLE 3-36: NEW REGISTERS FOR BOTH DEVICES
Register Purpose
INDFx Virtual indirect register
FSRx Holds target address of virtual register
Indirect AddressingDirect Addressing
Bank Select
Location Select
4 BSR 6
0
From Opcode
FSRxL7 0
Bank Select
Location Select
00000 00001 00010 11111
0x00
0x7F
Bank 0 Bank 1 Bank 2 Bank 31
0
FSRxH7 0
0 0 0 0
TABLE 3-37: NEW INSTRUCTIONS FOR BOTH DEVICES
Instruction English Purpose
incf Increment Add a value of one