5-6 Troubleshooting Charts
October 28, 2002 6881076C25-D
Chart C.4 Bootstrap Fail
Note: This
configuration
indicates the
C is in
Bootstrap
mode waiting
for data.
Host C
Bootstrap Failure.
Synopsis
The host C bootstrap mode is
used during reprogramming of
the host C and DSP FLASH
ROMs. Refer to appropriate
Theory of Operation section for
description of bootstrap
operation. Since the operating
code is downloaded through the
serial bus instead of from the
ROM and is initially executed in
the C internal RAM, this is a
good method of verifying
operation of the C. Basic
failure modes:
1) Necessary supplies,
grounds, system clocks not
present.
2) Vpp voltage not set to
correct voltage for bootstrap
mode select or FLASH
programming.
3) Improper configuration of
mode select pins.
4) Improper operation of RESET
to the host C.
5) Improper
configuration/operation of the
host C serial bus.
Verify standard
bias per table
Table 3.
No
Isolate and
repair problem.
See Chart C.5.
Yes
Standard
bias OK?
Verify voltage at VR207
(OPTB+/BOOT_SEL/VPP)
is: 10VDC†VPP†12.7VDC.
VPP is
correct?
Isolate open
and repair or
adjust VPP as
required.
No
Yes
Verify MODA and MODB of
U204 are pulled to a logic
low state (< .8VDC).
MODA and
MODB are
correct?
Repair inverter
circuit consisting
of VR207 and
Q204.
No
With the host C out of
reset and prior to any
downloading through the
serial bus:
Verify U204-PD1
(BOOT_DATA_OUT) is logic
low and U204-PD0 is logic
high (BOOT_DATA_IN).
Yes
PD0 and PD1
are correct?
Verify
BOOT_DATA_IN and
BOOT_DATA_OUT
are isolated by
MUX U208.
1
2
Yes
No
In some
circumstances
additional code is
downloaded and
placed in external
RAM. In this
case, a failure of
the external RAM
could look like a
bootstrap failure.
1
2
Initiate download
and verify the
data on
BOOT_DATA_IN is
echoed out on
BOOT_DATA_OUT
.
Signals are
isolated?
Verify MUX
control on Pin
4 of U208 is
low.
YesNo
Control
voltage
correct?
Repair inverter
circuit
composed of
VR207 and
Q203.
Replace U208.
Yes
No
Data echoed?
Replace U204.
MAEPF-24420-A
Yes
No
Verify continuity
of BOOT_DATA_IN
from J201-15 to
U204-PD0.
Signal good?
Yes
Verify U204 ECLK
is 1.8432 MHZ
–200ppM.
Replace Y201.
Verify download
baud rate is 7200.
Baud rate
correct?
ECLK frequency
correct?
Isolate and
repair open.
No
Fix baud rate.
Yes
Yes
No
No
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