Low Band, 800 MHz, PassPort & 900 MHz Theory of Operation: 800 MHz Receiver 7-11
7.7.3 Receiver Back-End (for PCB No. 8471827L03)
The receiver back end is a dual conversion design. The 73.35 MHz high IF consists of 2-pole crystal
filter FL350, IF amp Q350, 4-pole crystal filter FL351 and IF amp Q351. Each crystal filter has a 3 dB
bandwidth of 6.0 kHz and a maximum insertion loss of 4 dB. The output of Q351 is applied to the
input of the receiver IFIC U350. Diode D350 prevents overdriving the IFIC.
The IFIC is a low-voltage monolithic FM IF system incorporating a mixer/oscillator, two limiting IF
amplifiers, quadrature detector, logarithmic received signal strength indicator (RSSI), voltage
regulator and audio and RSSI op amps. The second LO frequency is determined by Y350. Additional
IF selectivity is provided by two ceramic filters, FL352 (between the second mixer and IF amp) and
FL353 (between the IF amp and the limiter input). FL352 is a 6 element filter with a BW6 = 9 kHz.
FL353 is a 4 element filter with a BW6 = 12 kHz. These bandwidths are optimum for 25 kHz channel
spacing systems. Ceramic resonator Y351 provides phase vs. frequency characteristic required by
the quadrature detector, with 90 degree phase shift occurring at 455 kHz. Buffer Q352 provides a
lower driving impedance from the limiter to the resonator, improving the IF waveform and lowering
distortion.
7.7.4 Automatic Gain Control Circuit
The automatic gain control circuit provides automatic gain reduction of both the low noise amplifier in
the receiver front end and the IF amplifier in the receiver backend. This action is necessary to
prevent overloading of the backend IF IC.
For PCB No. 8471827L03, the AGC circuit is disabled.
The IF automatic gain control circuit provides approximately 50 dB of attenuation range. The signal
strength indicator (RSSI) output of the IF IC produces a voltage that is proportional to the RF level at
the IF input to the IF IC. This voltage is inverted by U350, R351, R353, R352, R354 and C355 and it
determines the RF level at which the backend end AGC is activated as well as the slope of the
voltage at the output of U350 vs. the strength of the incoming RF at the antenna. The inverted output
of U350 is applied to the second gate of the IF amplifier U352 via R355. As the RF signal into the IF
IC increases the following occurs:
• The RSSI voltage increases,
• The output of inverter U350 decreases, and
• The voltage applied to the second gate of the FET is reduced thus reducing the gain of the IF
amplifier.
The output of inverter U350 is also used to control the receiver front end AGC.
The receiver front end automatic gain control circuit provides and additional 20 dB of gain reduction.
The output of the receiver backend inverter U350 is fed into the receiver front end AGC inverter
U302. The components R317, R314, and C318 determine:
• The RF level at which the front end AGC is activated, and
• The slope of the voltage at the output of U302 vs. the strength of the incoming RF at the antenna.
As the RF into the antenna increases the following occurs:
• The output voltage of the receiver backend inverter U350 decreases.
• The voltage at the output of the front end inverter U302 increases.
• The result is the forward biasing of pin diode CR301.
As the diode becomes more and more forward biased the following occurs:
• C310 loads the output of the low noise amplifier Q302 thus reducing the gain of the low noise
amplifier.
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