Operating Instructions
3-6 User’s Manual
3
Notes
1. For a complete description of the register bits, refer to the data
sheet for the specific chip. For a more detailed memory map,
refer to the following detailed peripheral device memory
maps.
2. The SCC is an 8-bit device located on an MCchip private data
bus. Byte access is required.
$FFF58280 - $FFF582FF IPIC IP_c ID D16 128 B 1
$FFF58300 - $FFF5837F IPIC IP_d I/O D16 128 B 1
$FFF58380 - $FFF583FF IPIC IP_d ID Read D16 128 B 1
$FFF58400 - $FFF584FF IPIC IP_ab I/O D32-D16 256 B 1
$FFF58500 - $FFF585FF IPIC IP_cd I/O D32-D16 256 B 8
$FFF58600 - $FFF586FF IPIC IP_ab I/O Repeated D32-D16 256 B 1
$FFF58700 - $FFF587FF IPIC IP_cd I/O Repeated D32-D16 256 B 8
$FFF58800 - $FFF5887F Reserved - - 128 B 1
$FFF58880 - $FFF588FF Reserved - - 128 B 1
$FFF58900 - $FFF5897F Reserved - - 128 B 1
$FFF58980 - $FFF589FF Reserved - - 128 B 1
$FFF58A00 - $FFF58A7F Reserved - - 128 B 1
$FFF58A80 - $FFF58AFF Reserved - - 128 B 1
$FFF58B00 - $FFF58B7F Reserved - - 128 B 1
$FFF58B80 - $FFF58BFF Reserved - - 128 B 1
$FFF58C00 - $FFF58CFF Reserved - - 256 B 1
$FFF58D00 - $FFF58DFF Reserved - - 256 B 1
$FFF58E00 - $FFF58EFF Reserved - - 256 B 1
$FFF58F00 - $FFF58FFF Reserved - - 256 B 1
$FFFBC000 - $FFFBC01F IPIC Registers D32-D8 2 KB 1
$FFFBC800 - $FFFBC81F Reserved - - 2 KB 1
$FFFBD000 - $FFFBFFFF Reserved - - 12 KB 4
$FFFC0000 - $FFFC7FFF MK48T08 (BBRAM, TOD Clock) D32-D8 32 KB 1
$FFFC8000 - $FFFCBFFF MK48T08 & Disable Flash writes D32-D8 16 KB 1, 7
$FFFCC000 - $FFFCFFFF MK48T08 & Enable Flash writes D32-D8 16 KB 1, 7
$FFFD0000 - $FFFEFFFF Reserved - - 128 KB 4
Table 3-2. Local I/O Devices Memory Map (Continued)
Address Range Devices Accessed Port Width Size Notes
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