Motorola MVME162 - Table 3-10. MK48 T08 BBRAM;TOD Clock Memory Map; Table 3-11. BBRAM Configuration Area Memory Map

Memory Maps
MVME162/D2 3-19
3
$1A
IP_b GENERAL
CONTROL
c_ERR
0
c_RT1 c_RT0 c_WIDTH1 c_WIDTH0
0
c_MEN
$1B
IP_b GENERAL
CONTROL
d_ERR
0
d_RT1 d_RT0 d_WIDTH1 d_WIDTH0
0
d_MEN
$1C RESERVED
0000 0 0 00
$1D
RESERVED 0000 0 0 00
$1E
RESERVED 0000 0 0 00
$1F
IP RESET 0000 0 0 0RES
Table 3-10. MK48T08 BBRAM/TOD Clock Memory Map
Address Range Description Size (Bytes)
$FFFC0000 - $FFFC0FFF User Area 4096
$FFFC1000 - $FFFC10FF Networking Area 256
$FFFC1100 - $FFFC16F7 Operating System Area 1528
$FFFC16F8 - $FFFC1EF7 Debugger Area 2048
$FFFC1EF8 - $FFFC1FF7 Configuration Area 256
$FFFC1FF8 - $FFFC1FFF TOD Clock 8
Table 3-11. BBRAM Configuration Area Memory Map
Address Range Description Size (Bytes)
$FFFC1EF8 - $FFFC1EFB Version 4
$FFFC1EFC - $FFFC1F07 Serial Number 12
$FFFC1F08 - $FFFC1F17 Board ID 16
$FFFC1F18 - $FFFC1F27 PWA 16
$FFFC1F28 - $FFFC1F2B Speed 4
$FFFC1F2C - $FFFC1F31 Ethernet Address 6
$FFFC1F32 - $FFFC1F33 Reserved 2
$FFFC1F34 - $FFFC1F35 Local SCSI ID 2
$FFFC1F36 - $FFFC1F3D Memory Mezzanine PWB 8
Table 3-9. IPIC Memory Map—Control and Status Registers (Continued)
IPIC Base Address = $FFFBC000
Register
Offset
Register
Name
Register Bit Names
D7 D6 D5 D4 D3 D2 D1 D0