Chapter 1
Advanced Chipset Features
The Advanced Chipset Features setup options are used to change the values
of the chipset registers. These registers control most of the system options in
the computer.
CMOS Setup Utility - Copyright(C) 1984-2000 Award Software
Advanced Chipset Features
DRAM Timing by SPD
Yes
Item Help
x SDRAM Cycle Length
Auto
Item Help
x DRAM Clock
Auto
Memory Hole
Disabled
Menu Level '
P2C/C2P Concurrency Enabled
Fast R-W Turn Around
Enabled
System BIOS Cacheable
Disabled
Video RAM Cacheable
Disabled
Frame Buffer Size
8M
AGP Aperture Size
64M
OnChipUSB Enabled
USB Keyboard Support
Disabled
OnChip Sound
Auto
OnChip Modem
Auto
CPU to PCI Write Buffer Enabled
PCI Dynamic Bursting
Enabled
PCI Master 0 WS Write
Enabled
PCI Delay Transaction
Enabled
PCI#2 Access #1 Retry
Enabled
AGP Master
1
WS Write
Disabled
AGP Master
1
WS Read
Disabled
Memory Parity/ECC Check Disabled
T i
—>
<—:Move Enter:Select
+/-/PU/PD:Value F10:Save ESCExit F1:General Help
F5:Previous Values F6:Fail-Safe Defaults F7:Optimized Defaults
JO Note: Change these settings only if you are familiar with the chipset.
DRAM Timing by SPD
Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect)
EEPROM on the DRAM module. Setting to
Yes
enables SDRAM Cycle Length
and DRAM Clock automatically to be determined by BIOS based on the con-
figurations on the SPD. Selecting No allows users to configure these fields
manually.
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