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NXP Semiconductors S32G2 - Spread Spectrum Considerations

NXP Semiconductors S32G2
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Spread spectrum
S32G2 Vehicle Network Processor - Clock Configuration Guide, Rev. 1, 11/2021
NXP Semiconductors 11

󰇟

󰇠
 
 󰇟󰇠

Equation 2
where,
 
󰇟

󰇠
󰇟󰇠

Equation 3
Frequency Modulation is only possible if the condition shown in the below equation is met
󰇛

󰇟

󰇠
󰇟󰇠
󰇜

Equation 4
The maximum possible modulation depth is:
󰇛󰇜
REF

󰇟󰇠
PLL_VCO
Equation 5
NOTE
The effective modulation depth may differ from the intended modulation
depth because of rounding operations applied to PLLFM[STEPSIZE] and
PLLFM[STEPNO].
5.2 Spread Spectrum Considerations
User must adhere to the below specification while using Spread Spectrum:
5.2.1 PLL VCO
The max frequency in case of center-spread SSCG enabled (
PLL_VCO
) for a modulation depth can be
selected as

󰇛
 
󰇜

󰇛
 
󰇜

󰇛 󰇜
Equation 6
5.2.2 Modulation frequency
With center-spread SSCG enabled the modulation frequencies for Core, Accelerator and DDR must be
within the range as specified in the table below.

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