Clock Configuration using S32DS Clocks Tool 
S32G2 Vehicle Network Processor - Clock Configuration Guide, Rev. 1, 11/2021 
NXP Semiconductors    13 
 
Figure 15.  Input parameters in spread spectrum tab 
The configurator will output the value of  fPLL_CORE_VCO with SSCG enabled, MFI, MFN, 
STEPNO and STEPSIZE. 
 
Figure 16.  Output of spread spectrum tab 
The user needs to use these values and program the PLL register fields as follows: 
/* PLL configuration with center-spread enabled --> CORE_PLL VCO frequency = 1985 MHz */ 
CORE_PLL.PLLDV.B.RDIV = 1; 
CORE_PLL.PLLDV.B.MFI = 49; 
CORE_PLL.PLLFD.B.MFN = 11520; 
/* Enable SSCG at 64 KHz */ 
CORE_PLL.PLLFM.B.SSCGBYP = 0; /* Spread spectrum modulation is not bypassed */ 
CORE_PLL.PLLFM.B.SPREADCTL = 0;   /* Center Spread modulation */ 
/* fMOD = 64 KHz, MD = 1.5% */ 
CORE_PLL.PLLFM.B.STEPNO    = 313;  
CORE_PLL.PLLFM.B.STEPSIZE  = 44;  
CORE_PLL.PLLFD.B.SDMEN     = 1;   /* Enable Sigma Delta Modulation */ 
6  Clock Configuration using S32DS Clocks Tool 
The S32DS Clocks Tool allows the user to easily configure the system clocks, including core and 
peripheral clocks, and then generate 32 bit register values and C-code.  
Visual inspection of the configured clock paths is available using the graphical clock tree.  
The Clocks Tool validates clock settings and provides calculations of the resulting clock frequencies.