DFS
S32G2 Vehicle Network Processor - Clock Configuration Guide, Rev. 1, 11/2021
NXP Semiconductors 5
Figure 2. DFS block diagram
The user needs to configure the value for the below parameters to achieve the target frequencies for
CORE_DFSn and PERIPH_DFSn.
1. PLL_VCO : Respective PLL_VCO frequency serves an input clock source to the DFS block.
2. MFI : Integer part of LDF.
3. MFN : Numerator of fractional LDF
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