Oki MSM85C154HVS - Page 137

MSM80C154S/83C154S/85C154HVS
130
Figure 4-44 Interrupt control equivalent circuit
INTERRUPT REQUEST
FLAG REGISTER
INTERRUPT ENABLE
REGISTER
INTERRUPT PRIORITY
REGISTER
SOURCE ENABLE
PX0
IP.0
PI
NI
EX0
IE.0
PT0
IP.1
PI
NI
EX0
IE.0
PX1
IP.2
PI
NI
EX0
IE.0
PT1
IP.3
PI
NI
EX0
IE.0
PS
IP.4
PI
NI
EX0
IE.0
PT2
IP.5
PI
NI
EX0
IE.0
EA
IE.7
V
CC
PCT
IP.7
V
CC
RETI
GLOBAL ENABLE
TCON.7 TF1
TIMER INTERRUPT 1
TCON.3 IE1
EXTERNAL INTERRUPT 1
TCON.5 TF0
TIMER INTERRUPT 0
TCON.1 IE0
EXTERNAL INTERRUPT 0
SCON.0 RI
SCON.0 TI
SERIAL PORT INTERRUPT
T2CON.7 TF2
T2CON.6 EXF2
TIMER INTERRUPT 2
I
H
L
NORMAL
INTERRUPT
HIGH PRIORITY
INTERRUPT
LOW PRIORITY
INTERRUPT
INTERRPUT PRIORITY COMPARATOR
INTERRUPT ADDRESS DATA
D
R
Q
CLOCK
D
R
CLOCK
Q