Oki MSM85C154HVS - Interrupt Priority When Priority Register (IP) Contents Are All 0

INTERNAL SPECIFICATIONS
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4.7.3.3 Interrupt priority when priority register (IP) contents are all “0”
The interrupt priority when the priority register (IP, 0B8H) contents are all “0” indicates the
priority in which a certain interrupt is processed in preference to other interrupts when
interrupt requests are generated simultaneously.
As can be seen from Table 4-21, the interrupt to be processed in preference to all other
interrupts is external interrupt 0, and the interrupt routine with lowest priority is timer interrupt
2.
The interrupt level when all priority bits are “0” is 1 level, and even if the interrupt conditions
for an external interrupt 0 (highest priority) are satisfied while timer interrupt 2 (lowest priority)
is being processed, the external interrupt cannot be processed.
The same operational preferences as described above also exist when all priority bits are “
1”.
Table 4-21 Non-priority interrupt order of preference
Order of preference
1
2
3
4
5
6
Interrupt source
External interruput 0
Timer interruput 0
External interruput 1
Timer interruput 1
Serial port interruput
Timer interruput 2