INTERNAL SPECIFICATIONS
75
4.4.2.9 Timer 2 control register (T2CON)
TMOD 0C8H TF2 EXF2 RCLK TCLK
EXEN2
TR2 C/
T2
CP/RL2
Name Address
MSB LSB
76543210
Bit location Flag Function
T2CON.0
T2CON.1
T2CON.2
T2CON.3
T2CON.4
T2CON.5
T2CON.6
T2CON.7
CP/
RL2
C/
T2
TR2
EXEN2
TCLK
RCLK
EXF2
TF2
Capture mode is set when TCLK+RCLK="0" and CP/
RL2
16-bit
auto reload mode is set when TCLK+RCLK="0" and CP/
RL2
="0".
CP/
RL2
is ignored when TCLK+RCLK="1".
Timer/counter 2 count clock designation control bit.
The internal clocks (XTAL1·2÷12, XTAL1·2÷2) are used when this
bit is "0", and the external clock applied to the T2 pin is passed to
timer/counter 2 when the bit is "1".
Timer/counter 2 counting start and stop control bit.
Timer/counter 2 commences counting when this bit is "1" and
stops counting when "0".
T2EX timer/counter 2 external control signal control bit. Input of the
T2EX signal is disabled when this bit is "0", and enabled when "1".
Serial port transmit circuit drive clock control bit.
Timer/counter 2 is switched to baud rate generator mode when this
bit is "1", and the timer/counter 2 carry signal becomes the serial
Port transmit clock. Note, however, that the serial ports can only
use the timer/counter 2 carry signal in serial port modes 1 and 3.
Serial port receive circuit drive clock control bit.
Timer/counter 2 is switched to baud rate generator mode when this
bit is "1", and the timer/counter 2 carry signal becomes the serial
Port receive clock. Note, however, that the serial ports can only
use the timer/counter 2 carry signal in serial port modes 1 and 3.
Timer/counter 2 external flag.
This bit is set to "1" when the T2EX timer/counter 2 external
control signal level is changed from "1" to "0" while EXEN2="1".
This flag serves as the timer interrupt 2 request signal. if an
interrupt is generated, it must be reset to "0" by software.
Timer/counter 2 carry flag.
This bit is set to "1" by a carry signal when timer/counter 2 is in 16-
bit auto reload mode or in capture mode.
This flag serves as the timer interrupt 2 request signal. if an
interrupt is generated, it must be reset to "0" by software.
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