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Oki MSM85C154HVS - CPU Internal Status by Reset

Oki MSM85C154HVS
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51
3.2.3 CPU internal status by reset
When a reset signal is applied to the CPU with normal voltage applied to the MSM80C154S/
MSM83C154S VCC power supply pin, ports 0, 1, 2, and 3 are set to “1” (input mode) even if
XTAL1·2 oscillation has been stopped. The output status of the ALE and PSEN pins also
becomes “1”. The CPU is then reset after normal XTAL1·2 oscillation has resumed. The
internal CPU status when the CPU is reset is shown in Table 3-1.
Table 3-1 MSM80C154S/MSM83C154S reset internal status
Register Name
PC
SP
IP
IE
PCON
PSW, DPH, DPL, A, B
SCON, TCON, TMOD
T2CON, IOCON, TL0
TL1, TL2, TH0, TH1
TH2, RCAP2L, RCAP2H
P1, P2, P3
P0
SBUF
INTERNAL RAM
ALE, PSEN
Register Reset Status
0000H
07H
40H(0 × 000000)
40H(0 × 000000)
10H(000 × 0000)
00H
*0FFH(input port)
*0FFH(floating)
Undefined
*“1” OUT
* Denotes direct resetting even if XTAL1·2 has stopped.

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