Oki MSM85C154HVS - Page 152

INTERNAL SPECIFICATIONS
145
Figure 4-52 Interrupt response time chart when IE or IP manipulating instruction is
executed after returning to main routine during continuous interrupt
processing
S4 S5 S6 S1 S2 S3
XTAL1 ALE Timer flag 1
S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6
Instruction execution
S6
1 - 0 1 0 -
M2 M1 or M2 M1
1 0
RETI execution
Timer 1 interrput address call
Execution of IE or IP manipulation instruction
Execution of one instruction
M1~M4
M1 or M2