Oki MSM85C154HVS - Page 160

INTERNAL SPECIFICATIONS
153
QS
R
IE0 or 1
QD
L
INT0 or INT1
PD
S3
RESET
S6
M END
PCON5(RPD)
PDRESET
S5
Figure 4-57 Power down cancellation circuit at INTERRUPT level input
S4
S2
S3
QS
L
R
IE0 or 1
PCON5(RPD)
PDRESET
D
Q
D
L
S3
D
L
S5
Q
PD
INT0 or INT1
W TCON
BUS
RESET
Figure 4-58 Power down cancellation circuit at INTERRUPT edge input