MSM80C154S/83C154S/85C154HVS
338
79. ORL A, @Rr (Logical OR indirect address to accumulator)
0100011r
70
Instruction code
Operation
Number of bytes
Number of cycles
Flags
(PSW)
Description
Example ORL A, @R0
Instruction code
: Byte 1
(A)←(A) OR ((Rr)) r=0 or 1:
C AC F0 RS1 RS0 OV F1 P
•
:
:
:
The logical OR between the accumulator contents and the data
memory location contents addressed by the register r contents
is determined. The result is placed in the accumulator and the
flag is updated.
:
01000110
70
Byte 1
Accumulator
00011000
70
1
1
Before execution
Accumulator
10111111
70
After execution
:
Register 0
01101101
70
Register 0
01101101
70
6DH
10100111
70
6DH
10100111
70
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