Panasonic FP-X0 L40MR - Page 254

Num-
ber
Name Boo-lean
Ope-
rand
Description
Steps
FP0/FP-e
FP0R
FP
Σ
FP-X
FP-X0
FP2
FP2SH/FP10SH
F15
P15
16-bit data
exchange
XCH
PXCH
D1, D2
(D1)→(D2), (D2)→(D1)
5
F16
P16
32-bit data
exchange
DXCH
PDXCH
D1, D2 (D1+1, D1)→(D2+1, D2)
(D2+1, D2)
→
(D1+1, D1)
5
F17
P17
Higher/lower
byte in 16-bit
data exchange
SWAP
PSWAP
D
The higher byte and lower byte of “D”
are exchanged. 3
F18
P18
16-bit data
block exchange
BXCH
PBXCH
D1, D2,
D3
Exchange the data between “D1” and
“D2” with the data specified by “D3”.
7
Control instruction
F19
Auxiliary jump
SJP
S
The program jumps to the label
instruction specified by “S” and
continues from there.
3
Binary arithmetic instructions
F20
P20
16-bit data
addition
+
P+
S, D (D)+(S)→(D)
5
F21
P21
32-bit data
addition
D+
PD+
S, D (D+1, D)+(S+1, S)→(D+1, D)
7
F22
P22
16-bit data
addition
+
P+
S1, S2,
D
(S1)+(S2)
→
(D)
7
F23
P23
32-bit data
addition
D+
PD+
S1, S2,
D
(S1+1, S1)+(S2+1, S2)→(D+1, D)
11
F25
P25
16-bit data
subtraction
-
P-
S, D
(D)-(S)→(D)
5
F26
P26
32-bit data
subtraction
D-
PD-
S, D
(D+1, D)-(S+1, S)→(D+1, D)
7
F27
P27
16-bit data
subtraction
-
P-
S1, S2,
D
(S1)-(S2)→(D)
7
F28
P28
32-bit data
subtraction
D-
PD-
S1, S2,
D
(S1+1, S1)-(S2+1, S2)→(D+1, D)
11
F30
P30
16-bit data
multiplication
*
P*
S1, S2,
D
(S1)X(S2)→(D+1, D)
7
F31
P31
32-bit data
multiplication
D*
PD*
S1, S2,
D
(S1+1, S1)X(S2+1, S2)→(D+3, D+2,
D+1, D)
11
F32
P32
16-bit data
division
%
P%
S1, S2,
D
(S1)÷(S2)→quotient (D)
remainder (DT9015)
7
F33
P33
32-bit data
division
D%
PD%
S1, S2,
D
(S1+1, S1)÷(S2+1, S2)→quotient (D+1,
D)
remainder (DT9016, DT9015)
11
F34
P34
16-bit data
multiplication
(result in 16
bits)
*W
P*W
S1, S2,
D
(S1)X(S2)→(D)
7
F35
P35
16-bit data
increment
+1
P+1
D (D)+1→(D)
3
F36
P36
32-bit data
increment
D+1
PD+1
D (D+1, D)+1→(D+1, D)
3
F37
P37
16-bit data
decrement
-1
P-1
D (D)-1→(D)
3
F38
P38
32-bit data
decrement
D-1
PD-1
D
(D+1, D)-1
→
(D+1, D)
3
F39
P39
32-bit data
multiplication
(result in 32
bits)
D*D
PD*D
S1, S2,
D
(S1+1, S1)x(S2+1, S2)→(D+1, D)
11
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