Philips CD-I - Page 93

Write
Address
Register
Note
340001
MR1A,MR2A mode register A
340003
CSRA
340005 CRA
340007 THRA
340009 ACR
34000B IMR
34000D CTUR
34000F
CTLR
340011
MR1B,MR2B
340013 CSRB
340015
CRB
340017 THRB
340019 IVR
34001B OPCR
34001D
34001F
-
Bit assignment
CPU D7
SCN68681 D7
Port assignment
Mark
OPO
OPl
OP2
OP3
OP4
OP5
OP6
OP7
IPO
!Pl
IP2
IP3
IP4
IP5
TXDA
TXDB
RXDA
RXDB
RTS-
DTR-
CTS-
DSR-
DCD-
RI-
TXD
RXD
clock select register
A
conunand register A
TX holding register A
auxiliary control register
interrupt mask register
counter/timer upper
counter/timer lower
mode register B
clock select register
B
command register B
TX holding register B
interrupt vector register
output port control register
set output port bits conunand
reset output bits conunand
D6
D6
D5
D5
Active
D4
D4
D3
D3
I/0 Note
D2
D2
Dl
Dl
0
request to send
DO
DO
L
L
0
data terminal ready
L I request
to send
L
I
data set ready
L I carrier detect
L I ring indicator
H 0 transmitted data
H I receive data
7-13
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