Pioneer PDP-R04G - Page 222

PDP-R04E
171
5678
56
7
8
C
D
F
A
B
E
TA1287FG (AV BOARD ASSY : IC8906)
• RGB to YUV/IQ High-speed Matrix IC
Block Diagram
CLAMP
MATRIX SW
B-Y/Q-MIX
VIN
1
CLAMP
YIN
2
Y-MIX
R-Y/I-MIX
TV/Ext.
MIX Ys
CLAMP
CLAMP
CLAMP
CLAMP
UIN
3
CPIN
4
GND
5
RGB
Y/I
Y
U/Q
YUV/IQ
RIN
6
GIN
7
BIN
Matrix Control
UOUT
YOUT
VOUT
VCC
YS3
YS2
YS1
8
16
15
14
13
12
11
10
9
No. Pin Name I/O
Pin Function
1 VIN
I
Input R-Y (V) or R signal through a clamping capacitor.
2 YIN I
Input Y or G signal through a clamping capacitor.
3 UIN I
Input B-Y (U) or B signal through a clamping capacitor.
4 CPIN
I
Input clamping pulse. Threshold: 0.75V
5 GND −
Ground
6 RIN I
Input R or R-Y (V) signal through a clamping capacitor.
7 GIN
I
Input G or Y signal through a clamping capacitor.
8 BIN I
Input B or B-Y (U) signal through a clamping capacitor.
9 YS1 I
Select to switch mixing ratio. Threshold: 0.75V
10 YS2
I
Select to switch mixing ratio. Threshold: 0.75V
11 YS3 I
Select to switch mixing ratio. Threshold: 0.75V
12 VCC −
Power supply 9V
13 VOUT
O
Output R-Y (V) or R signal.
14 YOUT O
Output Y or G signal.
15 UOUT O
Output B-Y (U) or B signal.
16 Matrix Control I
This pin's voltage control the matrix coefficient for output signals. Selects the output mode.
Pin Function