Quectel EG915U-EU - Page 23

LTE Standard Module Series
EG915U-EU_Hardware_Design 22 / 81
V
IH
max = 2.0 V
open.
DBG_TXD
23
DO
Debug UART receive
V
OL
max = 0.45 V
V
OH
min = 1.35 V
I2C Interface
Pin Name
Pin No.
I/O
Description
DC
Characteristics
Comment
I2C_SCL
40
OD
I2C serial clock (for
external codec)
External pull-up
resistor is
required.
1.8 V only. If
unused, keep it
open. If the I2C
interface is used
to connect to
external codec, it
cannot connect
to other external
devices.
I2C_SDA
41
OD
I2C serial data (for
external codec)
I2S Interface*
Pin Name
Pin No.
I/O
Description
DC
Characteristics
Comment
I2S_CLK*
63
DO
I2S clock
If unused, keep it
open.
The function is
under
development, we
do not
recommend
customers to use
it.
PCM Interface
Pin Name
Pin No.
I/O
Description
DC
Characteristics
Comment
PCM_SYNC
5
DI
PCM data frame sync
V
IL
min = -0.3 V
V
IL
max = 0.6 V
V
IH
min = 1.26 V
V
IH
max = 2.0 V
1.8 V power
domain.
If unused, keep it
open.
Only support
slave mode.
PCM_CLK
4
DI
PCM clock
V
IL
min = -0.3 V
V
IL
max = 0.6 V
V
IH
min = 1.26 V
V
IH
max = 2.0 V