Quectel EG915U-EU - Page 48

LTE Standard Module Series
EG915U-EU_Hardware_Design 47 / 81
The module provides 1.8 V UART interfaces. A level translator should be used if the application is
equipped with a 3.3 V UART interface. A level translator TXS0108EPWR provided by Texas Instruments
is recommended. The following figure shows a reference design.
VCCA VCCB
OE
A1
A2
A3
A4
A5
A6
A7
A8
GND
B1
B2
B3
B4
B5
B6
B7
B8
VDD_EXT
MAIN_RI
MAIN_DCD
MAIN_RTS
MAIN_RXD
MAIN_DTR
MAIN_CTS
MAIN_TXD
51K
51K
0.1 μF
0.1 μF
RI_MCU
DCD_MCU
RTS_MCU
TXD_MCU
DTR_MCU
CTS_MCU
RXD_MCU
VDD_MCU
Translator
10K
120K
Connect the MCU CTS pin
Connect the MCU RTS pin
Connect the MCU RXD pin
Connect the MCU TXD pin
Figure 23: Reference Circuit with Translator Chip
Please visit http://www.ti.com for more information.
Another example with transistor translation circuit is shown as below. For the design of circuits in dotted
lines, please refer to that of the circuits in solid lines, but please pay attention to the direction of
connection.
MAIN_DCD
38
DO
Main UART data carrier detect
MAIN_TXD
35
DO
Main UART transmit
MAIN_RI
39
DO
Main UART ring indication
MAIN_DTR
30
DI
Main UART data terminal ready
AUX_TXD
27
DO
Auxiliary UART transmit
AUX_RXD
28
DI
Auxiliary UART receive
DBG_RxD
22
DI
Debug UART transmit
1.8 V power domain.
If unused, keep it
open.
DBG_TxD
23
DO
Debug UART receive