Quectel FGH100M - Application Interfaces; Pin Assignment

Wi-Fi Module Series
FGH100M_Hardware_Design 15 / 41
4 Application Interfaces
4.1. Pin Assignment
2
3
4
5
6
7
8
9
10
11 12 13 14 15 16 17 18 19 20 21
31
30
29
28
27
26
25
24
23
22
40 39 38 37 36 35 34 33 321GND
VDD_FEM
WAKEUP_IN
RESET_N
GND
GND
GND
GND
RESERVED
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
VBAT
GND
JTAG_TDO
SDIO_DATA2
SDIO_DATA3
VDDIO
GND
SDIO_CMD
SDIO_CLK
SDIO_DATA0
SDIO_DATA1
GPIO10
GPIO7
GPIO8
GPIO9
JTAG_TMS
JTAG_TDI
JTAG_TRST
JTAG_TCK
ANT_WIFI
GND GND
RESERVED
GND
Power
GND SDIO JTAG GPIORF
CTL
RESERVED
Figure 2: Pin Assignment (Top View)
1. Keep all RESERVED or unused pins unconnected.
2. All GND pins should be connected to ground.
NOTE