Quectel LPWA Series

LPWA Module Series
BG950A-GL&BG951A-GL_Hardware_Design
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4.6.4. Behaviors of MAIN_RI*
AT+QCFG= “risignaltype”,“physical” can be used to configure MAIN_RI behavior. No matter on which
port a URC is presented, the URC will trigger the behavior of MAIN_RI pin.
Table 26: Pin Definition of MAIN_RI
In addition, MAIN_RI behaviors can be configured flexibly. The default behavior of the MAIN_RI is shown
as below.
Table 27: Default Behaviors of MAIN_RI
The MAIN_RI behavior can be changed via AT+QCFG="urc/ri/ring"*. See document [2] for details.
Pin Name
Pin No.
I/O
Description
Comment
MAIN_RI
39
DO
Main UART ring indication
1.8 V power domain.
If unused, keep this pin open.
The URC can be outputted via UART port, USB AT port and USB modem port, which can be set by
AT+QURCCFG. The default port is USB AT port.
State
Response
Idle
MAIN_RI keeps at high level.
URC
MAIN_RI outputs 120 ms low pulse when new URC returns.
URC can be outputted from UART port, USB AT port and USB modem port, through configuration via
AT+QURCCFG. The default port is USB AT port.
NOTE
NOTE