Quectel LTE Standard Module Series - Page 27

LTE Standard Module Series
EG21-G Mini PCIe Hardware Design
EG21-G_Mini_PCIe_Hardware_Design 26 / 54
PCM_CLK
PCM_SYNC
PCM_DOUT
MSB
LSB
PCM_DIN
125us
MSB
1 2
3231
LSB
Figure 9: Timing in Auxiliary Mode
Clock and mode can be configured by AT command, and the default configuration is master mode using
short frame synchronization format with 2048kHz PCM_CLK and 8kHz PCM_SYNC. In addition, EG21-G
Mini PCIe’s firmware has integrated the configuration on some PCM codec’s application with I2C interface.
Please refer to document [2] for details about AT+QDAI command.
The following figure shows a reference design of PCM and I2C interfaces with an external codec IC.
PCM_DIN
PCM_DOUT
PCM_SYNC
PCM_CLK
I2C_SCL
I2C_SDA
Codec
Module
1.8V
2.2K 2.2K
BCLK
FS
DACIN
ADCOUT
SCLK
SDIN
BIAS
MIC_BIAS
MIC+
MIC-
SPKOUT+
SPKOUT-
Figure 10: Reference Circuit of PCM and I2C Application with Audio Codec