1. The junction capacitance of D1, D2, D3 and D4 should not exceed 0.4 pF, and that of other ESD
protection components should not exceed 1 pF.
2. VCC_3V3 and VCC_5V are provided by the terminal board.
3. D5, D6, and D7 use Schottky diodes.
4. For Q1, Q2, Q3, it is recommended to use 2SK3018.
Table 25: HDMI Interface Trace Length Inside the Module (Unit: mm)
To ensure performance, the following principles should be complied with when designing HDMI interface:
⚫ Special attention should be paid to the pin description of HDMI interface. Different HDMI device will
have varied definitions for their corresponding connectors. Ensure that the devices and the
connectors are correctly connected.
⚫ HDMI are high-speed signal traces, supporting maximum data rate up to 6 Gbps. The differential
impedance should be controlled to 100 Ω. Additionally, it is recommended to route the traces on the
inner layer of PCB and do not cross it with other traces. To avoid crosstalk, a clearance of 4 times the
trace width among HDMI data signal traces and a clearance of 5 times the trace width between HDMI
data signal traces and clock signal traces are recommended. During impedance matching, do not
connect HDMI signal traces to GND on different planes to ensure impedance consistency.
⚫ It is recommended to select a TVS of low capacitance for ESD protection and the recommended
parasitic capacitance on HDMI data and clock signals should be lower than 0.4 pF and lower than
1 pF on other HDMI signals.
⚫ Route HDMI traces according to the following requirements:
a) The total trace length should not exceed 150 mm;
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