86 Rabbit 2000 Microprocessor
7.9.1 External Interrupts
There are two external interrupts. Because of a problem in the original Rabbit design, only
one of these interrupts is available for general use. The problem was corrected in revisions
A–C of the Rabbit 2000. (Refer to Appendix B for further information to determine which
version of the Rabbit 2000 chip you are using.) If you are working with an original Rabbit
2000 chip, see Technical Note 301, Rabbit 2000 Microprocessor Interrupt Problem.
External interrupts take place on a transition of the input. The pulse catchers are program-
mable separately to detect a rising, a falling, or both edges. The pairs of pulse catchers that
are connected to the same interrupt should be programmed for the same type of edge
detection.
Each of the interrupt pins has its own catcher device to catch the edge transition
and request the interrupt.
The pulse needs to be present for a least three peripheral clocks to
be detected.
When the interrupt takes place, both pulse catchers associated with that interrupt are auto-
matically reset. If both edges are detected before the corresponding interrupt takes place,
because the triggering edges occur nearly simultaneously or because the interrupts are
inhibited by the processor priority, then there will be only one interrupt for the two edges
detected. The interrupt service routine can read the interrupt pins via parallel port E and
determine which lines experienced a transition, provided that the transitions are not too
fast. Interrupts can also be generated by setting up the matching port E bit as an output and
toggling the bit.
Table 7-13. Control Registers for External Interrupts
Reg Name Reg Address Bits 7,6 Bits 5,4 Bits 3,2 Bits 1,0
I0CR 10011000 xx INT0B PE4 INT0A PE0 Enb INT0
I1CR 10011001 xx INT1B PE5 INT1A PE1 Enb INT1
edge triggered
00-disabled
10-rising
01-falling
11-both
edge triggered
00-disabled
10-rising
01-falling
11-both
interrupt
00-disable
01-pri 1
10-pri 2
11-pri 3
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