Renesas RA Family RA4 Quick Design Guide
R01AN5988EU0100 Rev.1.00 Page 45 of 51
Jul.21.21
Table 18. Available Oscillators in Each Operating Power Consumption Control Mode
PLL,
speed on-
chip
speed on-
chip
Low-speed
on-chip
Main
clock
Sub-clock
dedicated
on-chip
speed Available Available Available Available Available Available Available
speed N/A N/A N/A Available N/A Available Available
Note: While it may be possible to set the value in the OPCCR register to any of the low power operating
modes, clocking and voltage levels must also be set to meet the requirements of the desired mode.
Otherwise, the settings in the OPCCR register will not have any effect in lowering power consumption.
In order to achieve the lowest power consumption, use the maximum possible frequency division ratios in the
clock generation circuits.
Low power modes are canceled by various interrupt sources such as RES pin reset, power-on reset, voltage
monitor reset, and peripheral interrupts. Refer to the Low Power Modes section in the Hardware User’s
Manual for a list of interrupt sources for different LPMs.
Only Snooze mode is triggered by a Snooze request to enter snooze mode from Software Standby mode.
The transitions to other LPMs are done by executing a WFI instruction with appropriate settings in the
Standby Control register (SBYCR).
Renesas FSP provides a low power mode (LPM) driver and driver configurator to set up low power mode,
wake source/cancel source, and so forth.
Figure 35. Set up Low Power Mode Using Renesas FSP Configurator
After a specific LPM mode is set up by FSP Configurator, the LPM driver’s API can be used to initialize LPM
driver and place MCU in configured LPM mode, as shown in the following example:
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