Samsung S3C8275X - Port 0 High-Byte Control Register (P0 CONH); Port 0 Low-Byte Control Register (P0 CONL)

I/O PORTS S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
9-4
Port 0 Control Register, High Byte (P0CONH)
E4H, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
P0.7/BUZ
P0CONH bit-pair pin configuration settings:
00
01
10
11
Push-pull output mode
Alternative function
(BUZ, CLKOUT, TBOUT, TAOUT)
P0.6/CLKOUT
P0.5/TBOUT
P0.4/TAOUT
N-channel open-drain output mode
Schmitt trigger input mode
Figure 9-2. Port 0 High-Byte Control Register (P0CONH)
Port 0 Control Register, Low Byte (P0CONL)
E5H, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
P0.3/T1CLK
P0CONL bit-pair pin configuration settings:
00
01
10
11 Not available
P0.2/INT2 P0.1/INT1 P0.0/INT0
Schmitt trigger input mode (T1CLK)
N-channel open-drain output mode
Push-pull output mode
Figure 9-3. Port 0 Low-Byte Control Register (P0CONL)