Document# SCT-UM026FVC Page 30 of 46 Confidential
Exits Buffer Mode and aborts any pending triggers
Executing the clear command:
1. Sets the command mode back to Immediate mode
2. Empties the Command Queues
3. Empties the Data Queue
4. Aborts any armed triggers
5.1.13 delay
Wait for the specified number of clock cycles
<CYCLES> Wait Cycles:
Adds an additional amount delay, specified in clock cycles, between the executions of
each queued command while operating in Buffered Mode. The period of a clock cycle
is dependent on the clock rate of the current mode. Delay has no effect while in
Immediate Mode
Range = 1-4294967295 Cycles
5.1.14 gdw
Set the direction of the GPIO pins
GPIO Direction Write:
Set the direction of the GPIO pins to either an input (0) or output (1). The pins of
interest can be specified by setting or clearing the Pin Mask bits. For both the Pin
Mask and the Pin Direction, the binary bit position correlates to a specific GPIO pin;
i.e. bit[0] = GPIO1 … bit[7] = GPIO8
<MASK> Pin Mask:
The Pin Mask determines which GPIO pins will take on the respective bit values
contained in the Pin Direction.
Range = 0x00 – 0xFF
<DIR> Pin Direction:
Set the specified GPIO pin to either an input (0) or output (1) provided that the
respective bit value is set in the Pin Mask.
Range = 0x00 – 0xFF
5.1.15 gdr
Get the direction of the GPIO pins
GPIO Direction Read:
Get the direction of the GPIO pins as either an input (0) or output (1). For the
returned direction data, the binary bit position correlates to a specific GPIO pin;
i.e. bit[0] = GPIO1 … bit[7] = GPIO8
Returned read data can be accessed using the ‘read’ command.
5.1.16 gpw
Set the state of the GPIO pins
GPIO Position Write:
Set the state of the GPIO pins configured as an output (1). GPIO pins that are
configured as an input (0) will ignore the Pin State. The pins of interest can be
specified by setting or clearing the Pin Mask bits. For both the Pin Mask and the Pin
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