LR1121
User Manual Rev 1.1
UM.LR1121.W.APP Mar 2023
8 of 130
Semtech
Proprietary & Confidential
www.semtech.com
List of Figures
Figure 1-1: LR1121 Block Diagram ............................................................................................................. 12
Figure 2-1: LR1121 Modes and Transitions ............................................................................................. 13
Figure 2-2: Bootloader.................................................................................................................................... 14
Figure 3-1: Write Command Timing Diagram........................................................................................ 25
Figure 3-2: Read Command Timing Diagram ........................................................................................ 25
Figure 3-3: GetVersion Write Capture....................................................................................................... 26
Figure 3-4: GetVersion Read Capture........................................................................................................ 26
Figure 3-5: BUSY Timing Diagram.............................................................................................................. 29
Figure 5-1: LR1121 POR and BRN Functions........................................................................................... 43
Figure 6-1: LR1121 Thermal Insulation on PCB Top Layer................................................................. 45
Figure 6-2: TCXO Circuit Diagram .............................................................................................................. 45
Figure 7-1: Radio............................................................................................................................................... 48
Figure 7-2: LR1121 Current Profile During RX Duty Cycle Operation............................................ 54
Figure 7-3: RX Duty Cycle Upon Preamble Detection......................................................................... 54
Figure 8-1: LoRa /(G)FSK / LR-FHSS Command Order......................................................................... 62
Figure 8-2: LoRa Signal Bandwidth............................................................................................................ 64
Figure 8-3: LoRa Packet Format .................................................................................................................. 65
Figure 8-4: Fixed-Length Packet................................................................................................................. 72
Figure 8-5: Variable-Length Packet............................................................................................................ 72
Figure 8-6: LR-FHSS Spectral Plot Example............................................................................................. 79
Figure 9-1: LR1121 Power Amplifiers........................................................................................................ 84
Figure 9-2: PA Block Diagram ...................................................................................................................... 85
Figure 9-3: Low Power PA VR_PA Voltage vs.
TxPower ............................................................. 86
Figure 9-4: High Power PA VR_PA Voltage vs. TxPower..................................................................... 87
Figure 9-5: Low Power PA Output Power vs. TxPower ....................................................................... 88
Figure 9-6: HP PA Output Power vs. TxPower........................................................................................ 89
Figure 9-7: High Frequency PA Output Power vs. TxPower.............................................................. 90
Figure 9-8: IDDTX vs TxPower, Low Power PA, DC-DC Configuration .......................................... 91
Figure 9-9: IDDTX vs TxPower, Low Power PA, LDO Configuration............................................... 92
Figure 9-10: IDDTX vs TxPower, High Power PA, DC-DC Configuration....................................... 93
Figure 9-11: IDDTX vs TxPower, High Power PA, LDO Configuration ........................................... 93
Figure 9-12: IDDTX vs TxPower, High Frequency PA, DC-DC Configuration.............................. 94
Figure 9-13: IDDTX vs TxPower, High Frequency PA, LDO Configuration................................... 94
Figure 9-14: RF Switch, Double PA Operation ....................................................................................... 97
Figure 9-15: RF Switch, Single PA Operation (High Power PA Example)...................................... 97
Figure 9-16: Single Tie implementation: Only one PA Used (High Power PA Example)......... 98
Figure 9-17: Single Tie implementation: Both PAs Used (High Power PA Example) ............... 98
Figure 11-1: Key Derivation Scheme For LoRaWAN 1.1.x ................................................................ 117
Figure 11-2: Key Derivation Scheme for LoRaWAN 1.0.x................................................................. 118