Sharp HT-CN400DVH - Page 44

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HT-CN400DVH/HT-CN400DVE/HT-CN500DVH/HT-CN500DVE
53 GND — Digital Ground.
54 VDD — 2.5 Digital Supply.
55* BICKO Output Output l2S Serial Clock.
56* LRCKO Output Output l2S Left/Right Clock.
57* SDO_12 Output Output l2S Serial Data Channel 1 & 2.
58* SDO_34 Output Output l2S Serial Data Channel 3 & 4.
59 VDD3 — 3.3 V Digital Supply.
60 GND — Digital Ground.
61 VDD — 2.5 Digital Supply.
62* SDO_56 Output Output l2S Serial Data Channel 5 & 6.
63* SDO_78 Output Output l2S Serial Data Channel 7 & 8.
64 PWDN Input Device Powerdown.
IC503 92LRCI0308-001: Audio Processor (STA308) (2/2)
Port NamePin No. Input/Output
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
LRCK1
BICK1
SDI12
SDI34
SDI56
SDI78
PLLB
XTI
CKOUT
PWND EAPD
OUT1A/B
OUT2A/B
OUT3A/B
OUT4A/B
OUT5A/B
OUT6A/B
OUT7A/B
OUT8A/B
LRCKO
LICKO
SDO12
SDO34
SDO56
SDO78
SA
SERIAL
DATA
IN
CHANNEL
MAPPING
SYSTEM TIMING
PLL
POWER
DOWN
VARIABLE
DOWN-
SAMPLING
VARIABLE
OVER.
SAMPLING
TREBL,
BASS, EQ
(BIQUADS)
VOLUME
LIMITING
DDX
SERIAL
DATA
OUT
SYSTEM
CONTROL
OVERSAMPLING
I C
SCL SDA MVO
2
Figure 44 BLOCK DIAGRAM OF IC
IC107 92LRCI2402-002: EEP ROM (TA24C02N)
1 N.C. No Connection.
2, 3 A0, A1 Address inputs.
4 N.C. No Connection.
5 A2 Address inputs.
6 GND
7, 8 N.C. No Connection.
9 SDA Serial data.
10 SCL Serial clock input.
11 N.C. No Connection.
12 WP Write protect.
13 VCC
14 N.C. No Connection.
Port NamePin No.
Function